The present invention relates generally to semiconductor device manufacturing, and, more particularly, to a method for post lithographic critical dimension shrinking including post overcoat planarization.
The fabrication of integrated circuits on a semiconductor substrate typically includes multiple photolithography steps. A photolithography process begins by applying a thin layer of a photoresist material to the substrate surface. The photoresist is then exposed through a photolithography exposure tool to a radiation source that changes the solubility of the photoresist at areas exposed to the radiation. The photolithography exposure tool typically includes transparent regions that do not interact with the exposing radiation and a patterned material or materials that do interact with the exposing radiation, either to block it or to shift its phase.
As each successive generation of integrated circuits crowds more circuit elements onto the semiconductor substrate, it becomes necessary to reduce the size of the features, i.e., the lines and spaces that make up the circuit elements. The minimum feature size that can be accurately produced on a substrate is limited by the ability of the fabrication process to form an undistorted optical image of the mask pattern onto the substrate, by the chemical and physical interaction of the photoresist with the developer, and by the uniformity of the subsequent process (e.g., etching or diffusion) that uses the patterned photoresist.
Advanced lithography for formation of structures such as contact holes has become increasingly reliant on “shrink” methods in which a contact hole is imaged at a critical dimension (CD) larger than the target dimension, and is thereafter reduced to the target dimension through some post-lithography process. Many different processes are under development/exploration by resist vendors, as well as device manufacturers, using a wide range of techniques including reflow, etch tapering in intermediate layers, and overcoats that bind to the existing pattern with finite thickness. Although no clear front-runner has emerged in this relatively immature technology field, overcoat-based techniques offer certain fundamental advantages among litho-based techniques. More specifically, they offer the least opportunity for uncontrolled distortion of the lithographic image during the shrink (as compared to purely thermal reflow processes, for example) and have the best potential to offer consistent CD shrinks within the contact, regardless of pattern density.
Overcoat based chemical shrinks typically rely on an interaction with the already imaged resist material, wherein a new film is spin cast such that both materials fill in and overcoat the previously imaged material with a finite thickness. For example, in some common schemes, residual acid in the resist is used to catalyze a reaction with the overcoat material that crosslinks a controlled thickness of the overcoat both within the contact hole and on top of the resist surface. However, while this effect works relatively well along a straight edge, the diffusion behavior is much less ideal around a sharp corner of the feature. It is well known that degradation around top corners of lithographically imaged features contributes to uncontrolled variation in subsequent etch processing. Accordingly, it would be desirable to be able to improve this type of shrink process for corner features.